Line Distillation: A Mechanism to Improve Cache Utilization

Cache hierarchies play a very important role in bridging the speed gap between processors and memory. As this gap increases, it becomes increasingly important to intelligently design and manage a cache system. The performance of current caches is reduced because more than half of the data that is brought into the cache is never referenced, resulting in very low utilization. We propose line distillation, a technique to increase cache utilization by filtering the unused data from a subset of the lines and condensing the remaining useful data into smaller line-sizes. We describe three flavors of line distillation: naive-distillation, static-K-distillation, and adaptive-distillation. We also introduce the distill cache, a cache that supports line distillation and heterogeneous line-sizes. The line distillation technique reduces cache miss-rate by 21% on average.